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Contactless bottom-up electrodeposition of nickel for 3D integrated circuits

机译:用于3D集成电路的镍的无接触自下而上电沉积

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Packaging applications in the semiconductor industry rely on electrodepositing metals into high aspect ratio (HAR) vias without the formation of any defects or voids. The process and economic efficiency of conventional methodologies are limited by the ability to achieve high deposition rates along with uniformity of the deposited metal layer. In this work, a contactless and scalable electrodeposition technique has been developed to deposit metallic nickel onto p-doped silicon wafers. The effect of various process variables such as deposition and etchant solution composition and concentration, solution temperature and stirring on nickel deposition rates have been investigated. The importance of backside silicon oxidation and subsequent oxide etching on the kinetics of nickel deposition on frontside silicon has been highlighted.
机译:半导体行业的封装应用依靠将金属电沉积到高深宽比(HAR)通孔中而不会形成任何缺陷或空隙。常规方法的工艺和经济效率受到实现高沉积速率以及沉积金属层均匀性的能力的限制。在这项工作中,已经开发了一种非接触式和可扩展的电沉积技术,以将金属镍沉积到p掺杂的硅片上。研究了各种工艺变量,例如沉积和蚀刻剂溶液的组成和浓度,溶液温度和搅拌对镍沉积速率的影响。已经强调了背面硅氧化和随后的氧化物蚀刻对正面硅上镍沉积动力学的重要性。

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