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An investigation of the different charge trapping mechanisms for SiN _x and SiO _2 gate insulator in a-IGZO TFTs

机译:a-IGZO TFT中SiN _x和SiO _2栅绝缘体的不同电荷俘获机制的研究

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We investigated the threshold voltage (V _(TH)) shifts of a-IGZO thin-film transistors (TFTs) in which the gate-insulator was either SiO _2 or SiN _x. The V _(TH) shift of the TFT using a SiO _2 obeyed the stretched-exponential time model, and increased sharply according to temperature increase, whereas the SiN _x device obeyed the logarithmic time model, and exhibited weak temperature dependence. We found that an inter-layer formed between the IGZO and the SiN _x, whose existence can be the origin of poor bias stability and the different V _(TH) shift behavior in a-IGZO TFTs because the inter-layer accelerates the direct charge injection from the channel.
机译:我们研究了其中栅极绝缘体为SiO _2或SiN _x的a-IGZO薄膜晶体管(TFT)的阈值电压(V _(TH))的偏移。使用SiO _2的TFT的V _(TH)位移服从拉伸指数时间模型,并且随着温度的升高而急剧增加,而SiN _x器件服从对数时间模型,并且表现出较弱的温度依赖性。我们发现,在IGZO和SiN _x之间形成了一个中间层,其存在可能是偏压稳定性差以及a-IGZO TFT中不同的V _(TH)移位行为的根源,因为中间层会加速直接电荷从通道注入。

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