We report on the design and fabrication of carbon nanotube (CNT) vias based on a hybrid metal/CNT technology. The CNTs were integrated on a 4 inch Si wafer platform using conventional semiconductor processes. Multiwalled carbon nanotubes were grown vertically aligned on a copper based metal line. Via holes were prepared using a single damascene process. By employing a substrate-based selective deactivation of the catalyst, CNT growth was restricted to the vias. Following this process scheme, the impact of post-CNT growth procedures, like chemical mechanical planarization and sample annealing, were investigated and electrically evaluated using conductive atomic force microscopy and current-voltage (I-V) characterization. Probing 440 individual structures, the resistance of two series-connected 5 u,m vias were determined to be (800 ± 60) Ω after chemical mechanical planarization. By obtaining the I-V characteristics of single CNTs within an individual via, we found that the measured resistance is determined by the contact resistance of the CNT-metal interface. Two mechanisms were found to be relevant here. First partial oxidation of the metal interface during processing, and secondly, stress-induced voiding caused by the high temperatures during the CNT growth process. Changes in the integration scheme to reduce the overall CNT via resistance are proposed.
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