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Electrical Reliability Challenges of Advanced Low-k Dielectrics

机译:先进的低k电介质的电气可靠性挑战

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摘要

We review the latest studies that address the fundamental understanding of low-k dielectric electrical properties and reliability. We focus on the results discussing the nature of process induced defects, leakage currents and breakdown behavior, as they are important factors to reveal material modification and damage. Issues related to the use of porogen based PECVD techniques during dielectric deposition are discussed, where we focus on the selection of matrix and porogen precursors and on the improvements related to post-deposition treatments. During damascene integration, low-k dielectrics are subjected to several processes that induce material damage, where we review recent learning about plasma exposure, barrier deposition and chemical mechanical polishing. In order to have a successful implementation of advanced ultralow-k films in back-end-of-line interconnects, we argue that more research efforts are needed with respect to its material development, integration and reliability and make some proposals for future work. (C) The Author(s) 2014. Published by ECS. All rights reserved.
机译:我们回顾了针对低k介电电特性和可靠性的基本理解的最新研究。我们将重点放在讨论过程引起的缺陷,泄漏​​电流和击穿行为的性质的结果上,因为它们是揭示材料改性和损坏的重要因素。讨论了与在电介质沉积过程中使用基于致孔剂的PECVD技术有关的问题,我们集中在基质和致孔剂前体的选择以及与沉积后处理有关的改进上。在大马士革集成过程中,低k电介质会经历几种导致材料损坏的过程,在此我们回顾有关等离子体暴露,势垒沉积和化学机械抛光的最新知识。为了成功地在后端互连中成功实现先进的超低k膜,我们认为在材料开发,集成和可靠性方面需要做更多的研究工作,并为以后的工作提出一些建议。 (C)作者2014。由ECS出版。版权所有。

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