Fabrication of Ferroelectric Gate Memory Device Using BLT/HfO_2/Si Gate Structure

摘要

Ferroelectric gate FET's with BLT/HfO_2 structure were fabricated on 5-inch-scale Si wafer using well-refined CMOS compatible 0.8 (mu)m-based fabrication processes for the first time. We obtained excellent device characteristics and good memory operations of the fabricated n-ch and p-ch MFIS-FET's, in which the memory window and on)'off drain current ratio of typical p-ch memory device were measured to be 1.5 V at V_G of +-5 V and 8 orders-of-magnitude, respectively. We also confirmed by evaluating the gate voltage and gate size dependences of device properties that the fabricated devices showed quantitatively reasonable ferroelectric memory operations.