A low voltage 8-bit digital-to-analog converter using floating gate MOSFETs

摘要

A new low voltage digital-to-analog conversion (DAC) architecture is proposed using weighted summation of voltages at the input terminals of a Floating Gate MOSFET (FGMOS). An 8-bit DAC has been designed based on this architecture and its simulation results are provided to verify its operation at ±1.0 V. The circuit possesses good accuracy, fast dynamic performance and low power consumption. The circuit operation was verified through SPICE simulations carried out using 0.13 μm CMOS technology.