Towards SoC Validation Through Prototyping: A Systematic Approach Based on Reconfigurable Platform

摘要

Hardware/software covalidation is becoming one of the most critical issues in current System-on-Chip (SoC) design. Nowadays, covalidation is usually performed by cosimulation which is slow and lacks accuracy. The other alternative is to build a hardware prototype specific to the application. However, this alternative is expensive in terms of time, man-power, and cost. As SoCs increase in complexity, validation becomes more and more difficult, time consuming and error prone. Thus, a new approach for covalidation is inescapable. In this paper, we present a novel efficient prototyping approach for complex SoC covalidation. The proposed approach enables systematic prototyping of embedded applications on a reconfigurable platform. The process starts from the RT level model of the application. The application and the reconfigurable platform have to be adapted to obtain the prototype. We decompose the prototyping process into four steps, in order to match the application and the platform. Besides, we propose adapted solutions to deal with constraints typically encountered in existing reconfigurable platforms. The main advantages of this method are: fast and accurate validation, systematic prototyping flow, and large application field. Prototyping of a subset of VDSL using the ARM Integrator platform illustrates the effectiveness of our approach.