首页> 外文期刊>Journal of instrumentation: an IOP and SISSA journal >Monitoring single event upsets in SRAM-based FPGAs at the SuperKEKB interaction point
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Monitoring single event upsets in SRAM-based FPGAs at the SuperKEKB interaction point

机译:在超应答互动点处监控基于SRAM的FPGA的单个事件UPSET

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In February 2016, the SuperKEKB positron-electron high-luminosity collider of the KEK laboratory (Tsukuba, Japan) started being commissioned. A dedicated commissioning detector, named BEAST2, has been used to characterize beam backgrounds before the Belle2 detector was rolled into the beams and to provide tuning parameters for Monte Carlo simulations. BEAST2 consists of a fiberglass support structure and several sub-detectors mounted onto it, including time projection chambers (TPCs) and He-3 tubes. In this work, we present direct measurements of radiation-induced single event upsets in a SRAM-based FPGA device installed in BEAST2 at a distance of ~ 1m from the beam interaction point. Our goal was to provide experimental results of the expected radiation-induced configuration upset rate and power consumption variation at Belle2 and at other experiments operating in similar radiation environments. Beam currents for both electron and positron rings spanned a range between 50 and 500 mA, therefore providing data about the FPGA operation in different radiation conditions. Even if the machine has not been providing collisions yet, as the beams were not focused to the interaction point, our results show a rate of 0.15 upsets/day averaged over the whole commissioning time frame. We had neither evidence of total dose effects on the FPGA power consumption nor of permanent damage to the device.
机译:2016年2月,凯克实验室(Tsukuba,日本)的超克克正电子高光度撞机开始委托。名为BeaSt2的专用调试探测器已被用于在Belle2检测器滚入光束之前表征光束背景,并为蒙特卡罗模拟提供调谐参数。 Beast2由玻璃纤维支撑结构和安装在其上的几个子探测器组成,包括时间投影室(TPC)和HE-3管。在这项工作中,我们在距离光束交互点的距离距离〜1m的距离中,在安装在BeSt2中安装的基于SRAM的FPGA器件中的辐射诱导的单个事件扰动的直接测量。我们的目标是提供Belle2的预期辐射诱导的配置镦粗率和功耗变化的实验结果,以及在类似辐射环境中操作的其他实验。电子和正电子环的光束电流跨越50至500mA之间的范围,因此在不同的辐射条件下提供关于FPGA操作的数据。即使该机器还没有提供碰撞,随着光束未聚焦到交互点,我们的结果表明,在整个调试时间范围内平均0.15 upsets /日的速率。我们既没有关于FPGA功耗的总剂量影响的证据也没有对设备永久性损坏。

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