首页> 外文期刊>Russian Microelectronics >Solving the Problems of Routing Interconnects with a Resynthesis for Reconfigurable Systems on a Chip
【24h】

Solving the Problems of Routing Interconnects with a Resynthesis for Reconfigurable Systems on a Chip

机译:解决芯片上可重构系统的重新连接路由互连的问题

获取原文
获取原文并翻译 | 示例
获取外文期刊封面目录资料

摘要

The existing means of design automation are focused mainly on the technology of foreign manufacturers, which makes it necessary to adapt the existing methods and means for designing reconfigurable systems-on-a-chip and to develop domestic specialized CAD tools to solve urgent problems in this field. Methods are proposed for solving interconnection routing problems in conjunction with logical resynthesis, applied to the architecture of a reconfigurable system-on-a-chip based on the domestic field-programmable gate array (FPGA) of the Almaz-14 family. Developers from JSC “NIIME” and PJSC “Micron” laid broad configurational solutions, which do not have foreign analogues, into this crystal. A wide range of additional elements for the configuration, as well as the potentialities for the logical resynthesis of the FPGA Almaz-14 chip, have led to the need to develop new methods for routing interconnections that would allow us to take into account and use these architectural features. An efficient algorithm for the automatic routing of interconnections for a reconfigurable system on a chip based on FPGAs belonging to the Almaz-14 family based on algorithm A* is developed. This algorithm represents a modification of the classical algorithm searching for the shortest path on a graph, the Dijkstra algorithm, including a mixed switching graph model. To describe the variety of additional switching elements, a special generalized mathematical model, as well as a special interface in the command language Tcl are developed, the latter includes a list of elements for configuration, as well as their description and functional purpose. This work has increased the efficiency of computer-aided design using programmed mechanisms developed and implemented in the C programming language for the optimal use of the configuration and routing elements of FPGAs, as well as mechanisms for the complete and entire routing of interconnections.
机译:现有的设计自动化方法主要集中在外国制造商技术上,这使得能够适应设计可重新配置的系统的现有方法和手段,并开发国内专业的CAD工具,以解决迫切问题场地。提出了用于求解互连路由问题的方法与逻辑再合成一起应用于基于Almaz-14家族的国内现场可编程门阵列(FPGA)的可重新配置系统的芯片的架构。从JSC“Niime”和PJSC“Micron”的开发人员奠定了广泛的配置解决方案,该解决方案没有外国类似物,进入该晶晶。配置的各种附加元素以及FPGA Almaz-14芯片的逻辑再合成的潜力,导致需要开发用于路由互连的新方法,这些方法允许我们考虑并使用这些建筑功能。基于基于算法A *的FPGA,基于算法A *的FPGA自动路由用于基于FPGA的芯片上的可重新配置系统互连的高效算法。该算法表示经典算法的修改,搜索图形上的最短路径,Dijkstra算法,包括混合切换图模型。为了描述各种额外的交换元件,开发了一种特殊的广义数学模型,以及命令语言TCL中的特殊接口,后者包括用于配置的元素列表,以及他们的描述和功能目的。这项工作利用C编程语言开发和实现的编程机制提高了计算机辅助设计的效率,以获得FPGA的配置和路由元素的最佳使用,以及用于互连的完整和整个路由的机制。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号