Circuit simulation on drive capability by CMOS/SOI inverter inherently including lateral bipolar transistors - II

摘要

We notice a high drive capability of Lateral Bipolar (LB) transistor, which is inherently included in MOSFET. We proposed to set up such ideal current sources [1] formed in trapezoidal pulses that enhance the drive capabilities and are implemented by pull-up/pull-down MOSFETs [2] to the base terminals of LB-MOSFET (LBMOS). Then, we studied the performance of LBCMOS inverter, assuming an ideal device model of LBMOS without any parasitic resistances. In this paper II, we propose the LBMOS device structure having the channel (base) to be rather easily fabricated by double diffusions [3], presuming 0.35μm CMOS process. For Vdd = 1.2V, assumingβ{sub}f = lOO andβ{sub}r, we do circuit simulation in the case of LBCMOS inverter with pull-up/pull-down transistors as two current sources based on the precise values of parasitic resistance and capacitance. Especially, we try to study on the performance degradation by the emitter junction capacitor in addition to the base resistance. This results show that the speed and energy of LBCMOS inverter with the transistor sizes of Wn = Wp = 1.575μm are 10 higher and 1/3 lower than those of the ordinary CMOS inverter for driving the large load capacitance of 5.534fF (the gate capacitance of the above size inverter)× 100.