SoC CMOS technology for both high reliability and high performance

摘要

Novel device architecture is presented for realization of high reliability and high performance, where surface channel (SC) PMOSFET and buried channel (BC) PMOSFET are fabricated on the same chip without extra process steps. High reliability for negative bias temperature instability (NBTI)/hot carrier injection (HCI) and low noise characteristics are realized by BC structure for I/O and analog circuits, and high-speed and high integration are realized by SC structure for core circuits in System-on-a-Chip (SoC).