DESIGN AND PROCESSING OF INTEGRATED MICRO ACCEL-EROMETERS USING STANDARD CMOS PROCESS

摘要

A capacitive accelerometer integrated with a switchecl-capacitor circuitry on the same chip has been implemented by using a O.^im DPDM (Double Polysilicon Double Metal) CMOS process. We will explain the working principle of the capacitive accelerometer, and describe the design and the post-processing of the capacitive CMOS accelerometer chip. Metal 1 layer is selected as the sacrificial layer. The sensing capacitor of the capacitive accelerometer is composed of poly 1 layer and metal 2 layer. The post-CMOS processing steps need one mask only, and phosphoric acid is used lo etch the sacrificial layer for releasing the suspended structure. A swilched-capacitor circuitry is for the use of detecting the output signal of the aceeleiometer. The performance of this CMOS accelerometer demonstrates a bandwidth of 150Hz and an working range of ±l5g with a sensitivity of 120uV/g.