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首页> 外文期刊>Journal of Micromechanics and Microengineering >Fabrication process for CMUT arrays with polysilicon electrodes, nanometre precision cavity gaps and through-silicon vias
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Fabrication process for CMUT arrays with polysilicon electrodes, nanometre precision cavity gaps and through-silicon vias

机译:具有多晶硅电极,纳米精密腔隙和硅通孔的CMUT阵列的制造工艺

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摘要

Capacitive micromachined ultrasound transducers (CMUTs) can be used to realize miniature ultrasound probes. Through-silicon vias (TSVs) allow for close integration of the CMUT and read-out electronics. A fabrication process enabling the realization of a CMUT array with TSVs is being developed. The integrated process requires the formation of highly doped polysilicon electrodes with low surface roughness. A process for polysilicon film deposition, doping, CMP, RIE and thermal annealing that resulted in a film with sheet resistance of 4.0 Ω/□ and a surface roughness of 1 nm rms has been developed. The surface roughness of the polysilicon film was found to increase with higher phosphorus concentrations. The surface roughness also increased when oxygen was present in the thermal annealing ambient. The RIE process for etching CMUT cavities in the doped polysilicon gave a mean etch depth of 59.2 ± 3.9 nm and a uniformity across the wafer ranging from 1.0 to 4.7%. The two presented processes are key processes that enable the fabrication of CMUT arrays suitable for applications in for instance intravascular cardiology and gastrointestinal imaging.
机译:电容式微加工超声换能器(CMUT)可用于实现微型超声探头。硅通孔(TSV)允许CMUT和读出电子设备的紧密集成。正在开发一种能够使用TSV实现CMUT阵列的制造工艺。集成工艺需要形成具有低表面粗糙度的高掺杂多晶硅电极。已经开发了用于多晶硅膜沉积,掺杂,CMP,RIE和热退火的工艺,该工艺导致膜的薄层电阻为4.0Ω/□,表面粗糙度为1 nm rms。发现多晶硅膜的表面粗糙度随着较高的磷浓度而增加。当热退火环境中存在氧时,表面粗糙度也增加。用于在掺杂的多晶硅中刻蚀CMUT腔的RIE工艺的平均刻蚀深度为59.2±3.9 nm,整个晶圆的均匀度为1.0%至4.7%。提出的两个过程是关键过程,能够制造适用于例如血管内心脏病学和胃肠道成像的CMUT阵列。

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