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首页> 外文期刊>Journal of nanomaterials >Enhanced Device and Circuit-Level Performance Benchmarking of Graphene Nanoribbon Field-Effect Transistor against a Nano-MOSFET with Interconnects
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Enhanced Device and Circuit-Level Performance Benchmarking of Graphene Nanoribbon Field-Effect Transistor against a Nano-MOSFET with Interconnects

机译:石墨烯纳米带场效应晶体管相对于具有互连的纳米MOSFET的增强的器件和电路级性能基准测试

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摘要

Comparative benchmarking of a graphene nanoribbon field-effect transistor (GNRFET) and a nanoscale metal-oxidesemiconductor field-effect transistor (nano-MOSFET) for applications in ultralarge-scale integration (ULSI) is reported. GNRFET is found to be distinctly superior in the circuit-level architecture. The remarkable transport properties of GNR propel it into an alternative technology to circumvent the limitations imposed by the silicon-based electronics. Budding GNRFET, using the circuitlevelmodeling software SPICE, exhibits enriched performance for digital logic gates in 16 nmprocess technology.Theassessment of these performance metrics includes energy-delay product (EDP) and power-delay product (PDP) of inverter and NOR and NAND gates, forming the building blocks for ULSI.The evaluation of EDP and PDP is carried out for an interconnect length that ranges up to 100 μm. An analysis, based on the drain and gate current-voltage (I_d-V_d and I_d-V_g), for subthreshold swing (SS), drain-induced barrier lowering (DIBL), and current on/off ratio for circuit implementation is given. GNRFET can overcome the short-channel effects that are prevalent in sub-100 nm Si MOSFET. GNRFET provides reduced EDP and PDP one order of magnitude that is lower than that of aMOSFET. Even though the GNRFET is energy efficient, the circuit performance of the device is limited by the interconnect capacitances.
机译:报道了石墨烯纳米带场效应晶体管(GNRFET)和纳米级金属氧化物半导体场效应晶体管(nano-MOSFET)的比较基准,用于超大规模集成(ULSI)。发现GNRFET在电路级架构方面明显优越。 GNR具有非凡的传输性能,使其成为一种替代技术,以克服硅基电子产品带来的限制。使用电路级建模软件SPICE的Budding GNRFET在16纳米制程技术中展示了丰富的数字逻辑门性能,这些性能指标的评估包括逆变器以及NOR和NAND门的能量延迟乘积(EDP)和功率延迟乘积(PDP),形成ELSI和PDP的评估是针对互连长度不超过100μm的。基于漏极和栅极的电流电压(I_d-V_d和I_d-V_g),对亚阈值摆幅(SS),漏极引起的势垒降低(DIBL)和电路实现中的电流开/关比进行了分析。 GNRFET可以克服亚100 nm以下Si MOSFET中普遍存在的短沟道效应。 GNRFET提供的EDP和PDP减少量比MOSFET低一个数量级。即使GNRFET具有高能效,设备的电路性能也受到互连电容的限制。

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