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首页> 外文期刊>Journal of Korean Institute of Metal and Materials >A Flip Chip Process Using an Interlocking-Joint Structure Locally Surrounded by Non-conductive Adhesive
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A Flip Chip Process Using an Interlocking-Joint Structure Locally Surrounded by Non-conductive Adhesive

机译:使用局部被非导电胶包围的互锁接合结构的倒装芯片工艺

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摘要

A new flip chip structure consisting of interlocking joints locally surrounded by non-conductive adhesive was investigated in order to improve the contact resistance characteristics and prevent the parasitic capacitance increase. The average contact resistance of the interlocking joints was substantially reduced from 135 mΩ to 79 mΩ by increasing the flip chip bonding pressure from 85 MPa to 185 MPa. Improvement of the contact resistance characteristics at higher bonding pressure was attributed not only to the increased contact area between Cu chip bumps and Sn pads, but also to the severe plastic deformation of Sn pads caused during formation of the interlocking-joint structure. The parasitic capacitance increase due to the non-conductive adhesive locally surrounding the flip chip joints was estimated to be as small as 12.5%.
机译:为了改善接触电阻特性并防止寄生电容增加,研究了一种新的倒装芯片结构,该结构由局部被非导电粘合剂包围的互锁接头组成。通过将倒装芯片接合压力从85 MPa增加到185 MPa,可将互锁接头的平均接触电阻从135mΩ大幅降低至79mΩ。在较高的接合压力下,接触电阻特性的改善不仅归因于Cu芯片凸块和Sn焊盘之间的接触面积增加,而且归因于在形成互锁接合结构期间Sn焊盘的严重塑性变形。由于局部围绕倒装芯片接头的非导电粘合剂,寄生电容的增加估计小至12.5%。

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