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Evaluation of Residual Stress on Chip Using Capillary Underfill and Non-Conductive Film Caused by Flip-Chip Bonding Process Using Test Element Group Chips with Piezoresistive Sensors

机译：使用试验元素组芯片用压阻传感器使用倒装芯片粘接工艺引起的芯片底部填埋和非导电膜对芯片残留应力的评价

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Toshio Enami; Kyosuke Nanami; Osamu Horiuchi; Young-Gun Han; Hajime Tomokage;
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1. Reliability of assembly of chips and flex substrates using thermosonic flip-chip bonding process with a non-conductive paste [J] . Cheng-Li Chuang, Wei-How Chen, Hsun-Tien Li, Microelectronic Engineering . 2010,第11期

机译：使用具有非导电性糊剂的热超声倒装芯片键合工艺来可靠地组装芯片和柔性基板
2. Residual stress evaluation in resin-molded IC chips using finite element analysis and piezoresistive gauges [J] . Masaaki Koganemaru, Toru Ikeda, Noriyuki Miyazaki Microelectronics reliability . 2008,第6期

机译：使用有限元分析和压阻计评估树脂模制IC芯片中的残余应力
3. Reliability of Fine-Pitch Flip-Chip (COG) Bonding with Non-Conductive Film Using Ultrasonic Energy [J] . The Journal of Adhesion . 2010,第5a6期

机译：使用超声波能量与非导电膜的细间距倒装芯片（COG）键合的可靠性
4. Residual Stress Evaluation of Flip-Chip Bonding with Non-Conductive Films on Organic Substrate and Silicon Interposer by Piezo-Sensor Embedded Test Element Group Chips [C] . Toshio Enami, Kyosuke Nanami, Osamu Horiuchi, IEEE Electronics Packaging Technology Conference . 2015

机译：用压电传感器嵌入式测试元件组芯片与有机基材上的非导电膜与非导电膜的倒装芯片粘合的残余应力评估
5. Underfill adhesion characteristics, residual stresses and analysis of thermal stresses in flip-chip packages. [D] . Sham, Man-Lung. 2003

机译：倒装芯片封装中的底部填充粘合特性，残余应力和热应力分析。
6. Plastic-scale-model assembly of ultrathin film MEMS piezoresistive strain sensor with conventional vacuum-suction chip mounter [O] . Seiichi Takamatsu, Shintaro Goto, Michitaka Yamamoto, -1

机译：使用传统的真空抽吸贴片机的超薄膜MEMS压阻应变传感器的塑料比例模型组装
7. Stresses from flip-chip assembly and underfill; measurements with the ATC4.1 assembly test chip and analysis by finite element method [O] . Peterson, D.W., Sweet, J.N., Burchett, S.N., 1996

机译：倒装芯片组装和底部填充应力;用aTC4.1装配测试芯片测量并用有限元法分析
8. Stresses from flip-chip assembly and underfill; measurements with the ATC4.1 assembly test chip and analysis by finite element method [R] . Peterson, D. W., Sweet, J. N., Burchett, S. N., 1996

机译：倒装芯片组装和底部填充应力;用aTC4.1装配测试芯片测量并用有限元法分析

Evaluation of Residual Stress on Chip Using Capillary Underfill and Non-Conductive Film Caused by Flip-Chip Bonding Process Using Test Element Group Chips with Piezoresistive Sensors

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