The Triptych FPGA architecture

摘要

Field-programmable gate arrays (FPGAs) are an importantnimplementation medium for digital logic. Unfortunately, they currentlynsuffer from poor silicon area utilization due to routing constraints. Innthis paper we present Triptych, an FPGA architecture designed to achievenimproved logic density with competitive performance. This is done bynallowing a per-mapping tradeoff between logic and routing resources, andnwith a routing scheme designed to match the structure of typicalncircuits. We show that, using manual placement, this architecture yieldsna logic density improvement of up to a factor of 3.5 over commercialnFPGAs, with comparable performance. We also describe Montage, the firstnFPGA architecture to fully support asynchronous and synchronousninterface circuits