Dynamic algorithm transformations (DAT)-a systematic approach tolow-power reconfigurable signal processing

摘要

In this paper, dynamic algorithm transformations (DATs) forndesigning low-power reconfigurable signal-processing systems arenpresented. These transformations minimize energy dissipation whilenmaintaining a specified level of mean squared error or signal-to-noisenratio. This is achieved by modeling the nonstationarities in the inputnas temporal/spatial transitions between states in the input state-space.nThe reconfigurable hardware fabric is characterized by its configurationnstate-space. The configurable parameters are taken to be the filterntaps, coefficient and data precisions, and supply voltagenVdd. An energy-optimal reconfiguration strategy is derived asna mapping from the input to the configuration state-space. In thisnstrategy, taps are powered down starting with the tap with the smallestnvalue [wk2/Σm(wk)]n(where wk and Σm(wk) are,nrespectively, the adders, redundant-to-binary conversion, tree adders,ncoefficient and energy dissipation of the kth tap). Optimal values fornprecision and supply voltage Vdd are subsequently computednfrom the roundoff error and critical path delay requirements,nrespectively. The DAT-based adaptive filter is employed as a near-endncrosstalk (NEXT) canceller in a 155.52-Mb/s asynchronous transfernmode-local area network transceiver over category-3 wiring. Simulationnresults indicate that the energy savings range from -2% to 87% as thencable length varies from 110 to 40 m, respectively, with an averagensaving of 69%. An average saving of 62% is achieved for the case wherenthe supply voltage Vdd is kept fixed