A memory-based architecture for MPEG2 system protocol LSIs

摘要

This paper proposes a memory-based architecture implementing thenMPEG2 system protocol large scale integrations (LSIs), and demonstratesnits flexibility and performance. The memory-based architecturenimplements the full functionality of the MPEG2 system protocol for bothnmultiplexing and demultiplexing MPEG2-encoded streams. It consists of ancore central processing unit, memories, and dedicatednapplication-specific hardware. It is designed and optimized bynhardware/software codesign techniques. The LSI's provide sufficientnperformance and flexibility for real-time application of the MPEG2nsystem protocol. They were fabricated with 0.5 Μm CMOS embedded gatenarray process technology. They are now in use on MPEG2 codec systems fornseveral multimedia communication and storage services