A circuit-driven design methodology for video signal-processingdatapath elements

摘要

The programmable video signal processor (VSP) is an importantncategory of processors for multimedia systems. Programmable videonprocessors combine the flexibility of programmability with specialnarchitectural features that improve performance on video processingnapplications. VSPs are typically multiple processors with severalnprocessing elements (PEs) and a parallel memory system. This papernfocuses on the architectural design of the PE's in a video processor andnshows how technology and circuit parameters influence the structure ofnthe datapath and, hence, the overall architecture of a programmable VSP.nWe emphasize the need to consider technological and circuit-level issuesnduring the design of a system architecture and present a method wherebynthe conceptual organization of the PEs-the number of PEs, pipelining ofnthe datapath, size of the register file, and number of registernports-can be evaluated in terms of a target set of applications before andetailed design is undertaken. We use motion-estimation and discretencosine transform as example applications to illustrate how variousntechnology parameters affect the architectural design choices. We shownthat the design of the register file and the datapath-pipeline depth canndrastically affect PE utilization and, therefore, the number of PEsnrequired for different applications. Our results demonstrate thatnpursuing the fastest cycle time can greatly increase the silicon areanwhich must be devoted to PEs, due to both increased pipeline latency andnreduced register file bandwidth