COSYN: Hardware-software co-synthesis of heterogeneous distributedembedded systems

摘要

Hardware-software co-synthesis starts with an embedded-systemnspecification and results in an architecture consisting of hardware andnsoftware modules to meet performance, power, and cost goals. Embeddednsystems are generally specified in terms of a set of acyclic taskngraphs. In this paper, we present a co-synthesis algorithm COSYN, whichnstarts with periodic task graphs with real-time constraints and producesna low-cost heterogeneous distributed embedded-system architecturenmeeting these constraints. It supports both concurrent and sequentialnmodes of communication and computation. It employs a combination ofnpreemptive and nonpreemptive static scheduling. It allows task graphs innwhich different tasks have different deadlines. It introduces thenconcept of an association array to tackle the problem of multiratensystems. It uses a new task-clustering technique, which takes thenchanging nature of the critical path in the task graph into account. Itnsupports pipelining of task graphs and a mix of various technologies tonmeet embedded-system constraints and minimize power dissipation. Inngeneral, embedded-system tasks are reused across multiple functions.nCOSYN uses the concept of architectural hints and reuse to exploit thisnfact. Finally, if desired, it also optimizes the architecture for powernconsumption. COSYN produces optimal results for the examples from thenliterature while providing several orders of magnitude advantage inncentral processing unit time over an existing optimal algorithm. Thenefficacy of COSYN and its low-power extension COSYN-LP is alsonestablished through their application to very large task graphs (withnover 1000 tasks)