On effective IDDQ testing of low-voltage CMOS circuitsusing leakage control techniques

摘要

The use of low-threshold devices in low-voltage CMOS circuitsnleads to an exponential increase in the intrinsic leakage current. Thisnthreatens the effectiveness of IDDQ testing for suchnlow-voltage circuits because it is difficult to differentiate andefect-free circuit from defective circuits. Recently, several leakagencontrol techniques have been proposed to reduce intrinsic leakagencurrent, which may benefit IDDQ testing. In this paper, weninvestigate the possibilities of applying different leakage controlntechniques to improve the fault coverage of IDDQ testing.nResults on a large number of benchmarks indicate that dual-threshold andnvector control techniques can be very effective in improving faultncoverage for IDDQ testing for some circuits