首页> 外文期刊>IEEE transactions on very large scale integration (VLSI) systems >A Fast Hardware Approach for Approximate, Efficient Logarithm and Antilogarithm Computations
【24h】

A Fast Hardware Approach for Approximate, Efficient Logarithm and Antilogarithm Computations

机译:用于近似,有效对数和反对数计算的快速硬件方法

获取原文
获取原文并翻译 | 示例

摘要

The realization of functions such as log() and antilog() in hardware is of considerable relevance, due to their importance in several computing applications. In this paper, we present an approach to compute log() and antilog() in hardware. Our approach is based on a table lookup, followed by an interpolation step. The interpolation step is implemented in combinational logic, in a field-programmable gate array (FPGA), resulting in an area-efficient, fast design. The novelty of our approach lies in the fact that we perform interpolation efficiently, without the need to perform multiplication or division, and our method performs both the log() and antilog() operation using the same hardware architecture. We compare our work with existing methods, and show that our approach results in significantly lower memory resource utilization, for the same approximation errors. Also our method scales very well with an increase in the required accuracy, compared to existing techniques.
机译:硬件中的log()和antilog()之类的功能的实现具有相当大的意义,因为它们在几种计算应用程序中都很重要。在本文中,我们提出了一种在硬件中计算log()和antilog()的方法。我们的方法基于表查找,然后是插值步骤。内插步骤在现场可编程门阵列(FPGA)中以组合逻辑实现,从而实现了面积高效,快速的设计。我们的方法的新颖之处在于,我们可以高效地执行插值操作,而无需执行乘法或除法运算,并且我们的方法使用相同的硬件体系结构执行log()和antilog()操作。我们将我们的工作与现有方法进行了比较,结果表明,对于相同的近似误差,我们的方法可显着降低内存资源的利用率。与现有技术相比,我们的方法还可以很好地扩展规模,并提高了所需的精度。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号