An Evolutionary Computation Approach for Approximate Computing of PNN Hardware Circuits

摘要

Approximate computing is a way to help computer system greatly improve computing efficiency. Compared with traditional computer system's computing mode, the approximate computation of computers may be able to accomplish more tasks under the same resource consumption. In general, DSP hardware architecture requires using a large number of floating-point operations and multiplier, which will cost a large amount of hardware resources; using fixed-point arithmetic implemented in hardware enables the DSP algorithm to processing the constant multiplication simultaneously. However, on the other hand, this can affect the accuracy of the calculation results. Facing these hardware circuit design problems, this research attempt to realize the Probabilistic Neural Network (PNN) hardware architecture of approximate calculation with using genetic algorithm (GA). Considering hardware resource consumption and computing speed, we hope that by sacrificing the precision of operational results to reduce the hardware complexity of the PNN hardware circuit.