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A Sub-1 V, 26 $mu$W, Low-Output-Impedance CMOS Bandgap Reference With a Low Dropout or Source Follower Mode

机译:具有低压降或低压差的Sub-1 V,26 $ mu $ W,低输出阻抗CMOS带隙基准追随者模式

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We present a low-power bandgap reference (BGR), functional from sub-1 V to 5 V supply voltage with either a low dropout (LDO) regulator or source follower (SF) output stage, denoted as the LDO or SF mode, in a 0.5-$mu$m standard digital CMOS process with $V_{tn}approx$ 0.6 V and $vert V_{tp}vert approx$ 0.7 V at 27 $^{circ}$C. Both modes operate at sub-1 V under zero load with a power consumption of around 26 $mu$W. At 1 V (1.1 V) supply, the LDO (SF) mode provides an output current up to 1.1 mA (0.35 mA), a load regulation of ${pm}$8.5 mV/mA (${pm}$33 mV/mA) with approximately 10 $mu$ s transient, a line regulation of ${pm}$4.2 mV/V ( ${pm}{hbox {50}} mu$V/V), and a temperature compensated reference voltage of 0.228 V (0.235 V) with a temperature coefficient around 34 ppm/$^{circ}$ C from ${-}{hbox {20}}, ^{circ}$C to 120 $^{circ}$C. At 1.5 V supply, the LDO (SF) mode can further drive up to 9.6 mA (3.2 mA) before the reference voltage falls to 90% of its nominal value. Such low-supply-voltage and high-current-driving BGR in standard digital CMOS processes is highly useful in portable and switching a-n-npplications.
机译:我们提供了一种低功率带隙基准(BGR),其工作电压范围从低于1 V到5 V,具有低压降(LDO)调节器或源跟随器(SF)输出级,表示为LDO或SF模式。 0.5- $ mu $ m标准数字CMOS工艺,具有 $ V_ {tn}约$ 0.6 V和 $ vert V_ {tp} vert约$ < / formula> 0.7 V at 27 $ ^ {circ} $ C。两种模式都在零负载下在低于1 V的电压下工作,功耗约为26 $ mu $ W。在1 V(1.1 V)电源下,LDO(SF)模式可提供高达1.1 mA(0.35 mA)的输出电流,负载调整率 $ { pm} $ 8.5 mV / mA( $ {pm} $ 33 mV / mA)具有大约10个 $ mu $ 的瞬态, $ {pm} $ 4.2 mV / V( $ {pm} {hbox {50}} mu $ < / tex> V / V),温度补偿的参考电压为0.228 V(0.235 V),温度系数约为34 ppm / $ ^ {circ} $ C来自 $ {-} {hbox {20}},^ {circ} $ C到120 $ ^ {circ} $ C。在1.5 V电源下,LDO(SF)模式可在基准电压降至其标称值的90%之前进一步驱动高达9.6 mA(3.2 mA)的电流。在标准数字CMOS工艺中,这种低电源电压和高电流驱动BGR在便携式和开关式n-n-nplication中非常有用。

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