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Efficient CODEC Designs for Crosstalk Avoidance Codes Based on Numeral Systems

机译:基于数字系统的高效串扰规避代码编解码器设计

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Low-complexity CODECs for two classes of crosstalk avoidance codes (CACs), forbidden pattern codes (FPCs) and forbidden transition codes (FTCs), have been recently proposed based on Fibonacci-based binary numeral system. In this paper, we first generalize this idea and establish a generic framework for the CODEC design of all classes of CACs based on binary mixed-radix numeral systems. Using this framework, we then propose novel CODEC designs for three important classes of CACs, one lambda codes (OLCs), FPCs, and forbidden overlapping codes (FOCs). Our CODEC designs have area complexity and delay that increase quadratically with the size of the bus, while achieving optimal or nearly optimal code rates. Our CODECs also have simple and regular circuitry, and can easily achieve very high throughput by pipelining. Our efficient CODECs, used with such techniques as partial coding, help to make CACs a practical option in combating crosstalk delay, which is a bottleneck in deep submicrometer system-on-chip designs.
机译:最近,基于基于斐波那契的二进制数字系统,针对两类串扰避免代码(CAC),禁止模式代码(FPC)和禁止转换代码(FTC)提出了低复杂度的编解码器。在本文中,我们首先对此思想进行概括,并为基于二进制混合基数系统的所有类别的CAC的CODEC设计建立通用框架。然后,使用该框架,我们为三种重要的CAC,一个lambda码(OLC),FPC和禁止重叠码(FOC)提出了新颖的CODEC设计。我们的CODEC设计具有面积复杂度和延迟,随总线大小成倍增加,同时实现了最佳或接近最佳的编码率。我们的编解码器还具有简单而规则的电路,并且可以通过流水线轻松实现很高的吞吐量。我们的高效编解码器与部分编码等技术配合使用,有助于使CAC成为应对串扰延迟的切实可行的选择,而串扰延迟是深亚微米芯片级系统设计的瓶颈。

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