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Design of Ternary Logic Combinational Circuits Based on Quantum Dot Gate FETs

机译:基于量子点栅极FET的三元逻辑组合电路设计

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In this paper, we discuss logic circuit designs using the circuit model of three-state quantum dot gate field effect transistors (QDGFETs). QDGFETs produce one intermediate state between the two normal stable ON and OFF states due to a change in the threshold voltage over this range. We have developed a simplified circuit model that accounts for this intermediate state. Interesting logic can be implemented using QDGFETs. In this paper, we discuss the designs of various two-input three-state QDGFET gates, including NAND- and NOR-like operations and their application in different combinational circuits like decoder, multiplier, adder, and so on. Increased number of states in three-state QDGFETs will increase the number of bit-handling capability of this device and will help us to handle more number of bits at a time with less circuit elements.
机译:在本文中,我们将使用三态量子点栅场效应晶体管(QDGFET)的电路模型来讨论逻辑电路设计。由于阈值电压在此范围内变化,QDGFET在两个正常的稳定导通和截止状态之间产生一个中间状态。我们已经开发出一种简化的电路模型来说明这种中间状态。有趣的逻辑可以使用QDGFET来实现。在本文中,我们讨论了各种两输入三态QDGFET门的设计,包括与非和非门操作以及它们在解码器,乘法器,加法器等不同组合电路中的应用。三态QDGFET中增加的状态数将增加该器件的位处理能力,并帮助我们一次用更少的电路元件来处理更多的位。

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