首页> 外国专利> Circuit for ternary signal processing based on ternary and quaternary logic passes ternary signals through gates in logical relation and converts to ternary signal at end stage

Circuit for ternary signal processing based on ternary and quaternary logic passes ternary signals through gates in logical relation and converts to ternary signal at end stage

机译:基于三元和四元逻辑的三元信号处理电路将三元信号以逻辑关系通过门,并在末级转换为三元信号

摘要

A circuit (45) for ternary signal processing based on ternary/quaternary logic comprises four potential levels giving four logic numbers 0,1,2,3 at dual gates (9). Signals are linked to two P-binary signals and through a P-logic gate (5,7) in a logical/arithmetical relation and converted into a ternary signal through an end stage (17).
机译:用于基于三态/四态逻辑的三态信号处理的电路(45)包括四个电位电平,在双门(9)处给出四个逻辑数字0、1、2、3。信号以逻辑/算术关系链接到两个P二进制信号并通过P逻辑门(5,7),并通过末级(17)转换为三进制信号。

著录项

  • 公开/公告号DE202005011870U1

    专利类型

  • 公开/公告日2005-10-27

    原文格式PDF

  • 申请/专利权人 TEVKUER TALIP;

    申请/专利号DE20052011870U

  • 发明设计人

    申请日2005-07-21

  • 分类号H03K19/00;

  • 国家 DE

  • 入库时间 2022-08-21 22:00:08

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