20-Gb/s CMOS EA/MZ Modulator Driver With Intrinsic Parasitic Feedback Network

摘要

This paper presents an inductive intrinsic parasitic feedback technique to enhance the circuit bandwidth of the electro-absorption/Mach–Zehnder optical modulator driver with high-voltage swing-driving capability. The modulator consists of a series-shunt inductor peaking predriver stage and a multicascode postdriver stage. The postdriver stage integrates the proposed inductive intrinsic parasitic feedback network, the interstage series inductor-peaking scheme, and the auxiliary source degeneration structure. The chip is fabricated in 0.13- $mu{rm m}$ mixed-signal 1P8M standard CMOS process with a die size of $900times 800~mu{rm m}^{2}$. The operation data rate of this design is measured up to 20-Gb/s with 3.7 $V_{rm PP}$ S.E. output amplitude swing, driving 50-$Omega$ resistive load with input signal less than 250 mV. The measured rise/fall time of the output electrical eye diagram is less than 20 ps and the total power consumption is 0.9 W with 1.2/4.0 V dual supplies.