机译:基于选择晶体管冗余的组合电路容错技术
College of Computer Science and Engineering, King Fahd University of Petroleum and Minerals, Dhahran, Saudi Arabia;
Computer Engineering Department, King Fahd University of Petroleum and Minerals, Dhahran, Saudi Arabia;
Computer Engineering Department, King Fahd University of Petroleum and Minerals, Dhahran, Saudi Arabia;
Computer Engineering Department, King Fahd University of Petroleum and Minerals, Dhahran, Saudi Arabia;
Logic gates; Redundancy; MOSFET; Inverters; Integrated circuit reliability;
机译:基于双模块冗余(DMR)的组合电路容错技术
机译:用于增强组合电路容错能力的通用模块化冗余方案
机译:基于影响和晶体管尺寸的组合电路集成容错技术
机译:基于FPGA的故障注射技术,用于快速评估VLSI电路的容错
机译:时序电路的容错技术:设计级方法。
机译:多设备开路故障下基于降阶最优控制策略的ANPC三电平逆变器容错控制
机译:一种提高组合电路容错能力的广义模冗余方案
机译:容错设计与冗余管理技术