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Recursive Synaptic Bit Reuse: An Efficient Way to Increase Memory Capacity in Associative Memory

机译:递归突触位重用:一种有效的方式来增加关联内存中的内存容量

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Neural associative memory (AM) is one of the critical building blocks for cognitive computing systems. It memorizes (learns) and retrieves input data by information content itself. One of the key challenges of designing AM for intelligent devices is to expand memory capacity while using a minimal amount of hardware and energy resources. However, prior arts show that memory capacity increases slowly, i.e., in square root with the total number of synaptic weights. To tackle this problem, we propose a synapse model called recursive synaptic bit reuse, which enables near-linear scaling of memory capacity with total synaptic bits. Our model can also handle input data that are correlated more robustly than the conventional model. We evaluated our model in the context of Hopfield neural networks (HNNs) that contain 5-327-KB data storage for synaptic weights. Our model can increase the memory capacity of HNNs as large as 30x over the conventional ones. The very large scale integration implementation of HNNs in 65 nm confirms that our proposed model can save up to 19x area and up to 232x energy dissipation as compared to the conventional model. These savings are expected to grow with the network size.
机译:神经联想记忆(AM)是认知计算系统的重要组成部分之一。它根据信息内容本身进行记忆(学习)并检索输入数据。设计用于智能设备的AM的主要挑战之一是在使用最少数量的硬件和能源的同时扩展存储容量。但是,现有技术表明,存储容量缓慢增加,即,与突触权重的总数成平方根。为了解决这个问题,我们提出了一种称为递归突触位重用的突触模型,该模型使存储器容量与总突触位能够以近乎线性的比例缩放。我们的模型还可以处理比常规模型更可靠地关联的输入数据。我们在Hopfield神经网络(HNN)的上下文中评估了我们的模型,该网络包含用于突触权重的5-327 KB数据存储。我们的模型可以将HNN的存储容量提高到传统存储的30倍。 HNN在65 nm的超大规模集成实现证实了我们提出的模型与传统模型相比可以节省多达19倍的面积和多达232倍的能耗。这些节省预计将随着网络规模的增长而增加。

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