Memory address expansion system for microcomputer installation - sums data register output with address bits to increase capacity

摘要

An address space expansion facility is provided for use with a system based around a microprocessor (1), e.g. Intel 8086 family, that has a specific number of address outputs (2). The processor also has a data bus (3) coupled to a register (4). An adder unit (5) combines the 12 bit outputs of the register with the lower order bits of the address bus. In the specific case the adder generates a 24 bit address word to increase memory addressing capacity from the original 20 bit value. The value are multiplexed to the read/write memory. ADVANTAGE - Uses data bits to expand address capacity.