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Power gain assessment of ITO based Transparent Gate Recessed Channel (TGRC) MOSFET for RF/wireless applications

机译:用于射频/无线应用的基于ITO的透明栅嵌入式沟道(TGRC)MOSFET的功率增益评估

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摘要

In this work, power gain assessment and intrinsic delay of Transparent Gate Recessed Channel (TGRC) MOSFET have been observed for RF applications and the results so obtained have been compared with Conventional Recessed Channel (CRC) MOSFET. Simulation results show that TGRC architecture has significantly improved the power gains in terms of maximum available power gain (Gma), maximum transducer power gain (G_(MT)). maximum stable power gain (Gms) and appreciable reduction in intrinsic delay as compared to CRC-MOSFET owing to indium tin oxide (ITO) in recessed channel as a conducting gate material and thus providing its efficacy for low power switching applications. Further, effect of gate length scaling has also been observed on TGRC MOSFET and it has been found that the cut-off frequency (f_T) and maximum oscillator frequency (f_(MAX)) enhances by 66% and 36% respectively as channel length scales down to 20 nm. Further, the effect of negative junction depth, oxide thickness and substrate doping have also been investigated for TGRC-MOSFET. This TCAD assessment has been done at frequencies of several THz which fortify its use for high frequency RF/wireless applications.
机译:在这项工作中,对于RF应用,已经观察到了透明栅极嵌入式沟道(TGRC)MOSFET的功率增益评估和固有延迟,并将所获得的结果与常规嵌入式沟道(CRC)MOSFET进行了比较。仿真结果表明,TGRC架构在最大可用功率增益(Gma),最大换能器功率增益(G_(MT))方面显着改善了功率增益。与CRC-MOSFET相比,由于凹槽通道中的铟锡氧化物(ITO)作为导电栅极材料,因此具有最大的稳定功率增益(Gms)和固有延迟的显着降低,从而为低功率开关应用提供了功效。此外,在TGRC MOSFET上也观察到了栅极长度缩放的影响,并且发现随着沟道长度缩放,截止频率(f_T)和最大振荡器频率(f_(MAX))分别提高了66%和36%。低至20 nm。此外,还研究了TGRC-MOSFET的负结深度,氧化物厚度和衬底掺杂的影响。这项TCAD评估是在几个THz的频率下完成的,这加强了其在高频RF /无线应用中的使用。

著录项

  • 来源
    《Superlattices and microstructures》 |2016年第3期|290-301|共12页
  • 作者单位

    Microelectronics Research Lab, Department of Engineering Physics, Delhi Technological University, Bawana Road, Delhi-110042, India;

    Microelectronics Research Lab, Department of Engineering Physics, Delhi Technological University, Bawana Road, Delhi-110042, India;

    Microelectronics Research Lab, Department of Engineering Physics, Delhi Technological University, Bawana Road, Delhi-110042, India;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    CRC-MOSFET; Intrinsic delay; ITO; Power gains; RF; TGRC-MOSFET;

    机译:CRC-MOSFET;内部延迟ITO;功率增益;射频;TGRC-MOSFET;

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