This paper describes a mixed-signal ASIC for dual-mode (analog/digital) cellular telephony applications. It consists of two transmit and two receive channels corresponding to the I and Q channels of a quadrature phase-shift keying (QPSK) modulation system. It also includes three 8 b DAC's for control purposes, as well as a bandgap voltage reference and bus interface circuitry. The chip is part of a four-chip implementation of an IS-54 dual mode telephone. The chip was implemented in a 0.8 /spl mu/m n-well double-metal CMOS process and uses a 5 V power supply. The die area of the chip was 23 mm/sup 2/ and the average power consumption was 125 mW.
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机译：本文介绍了一种用于双模（模拟/数字）蜂窝电话应用的混合信号ASIC。它由两个发送和两个接收通道组成，分别对应于正交相移键控（QPSK）调制系统的I和Q通道。它还包括三个用于控制目的的8 b DAC，以及一个带隙基准电压源和总线接口电路。该芯片是IS-54双模电话的四芯片实现的一部分。该芯片以0.8 / spl mu / m的n阱双金属CMOS工艺实现，并使用5 V电源。芯片的管芯面积为23 mm / sup 2 /，平均功耗为125 mW。
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