A PWM signal processing core circuit based on a switched currentintegration technique

摘要

A highly functional circuit for pulse width modulation (PWM)nsignal processing is proposed as a core of the A-D merged circuitnarchitecture for time-domain information processing. The core circuitnemploys a switched-current integration technique as its computingnarchitecture and functions as a linear arithmetic operator, a memory,nand also a delaying device of PWM signals. A 0.8-Μm CMOS test chipnincludes 110 transistors plus two capacitors and performs parallelnadditions and multiplications at the accuracy of 1.2 ns. A cumulativenproperty of the technique allows the circuit to serve as a low-powernaccumulator that consumes 23% of the energy of the full digital 7-bnaccumulator. A PWM multiply-accumulate unit and a nonlinear operationnunit are also proposed to extend functionality of the circuit. Since thenPWM signal carries multibit data in a binary amplitude pulse, thesencircuits can be favorably applicable to low-voltage and low-powerndesigns in the deep submicrometer era