A versatile 3.3/2.5/1.8-V CMOS I/O driver built in a 0.2-/spl mu/m, 3.5-nm Tox, 1.8-V CMOS technology

摘要

This I/O driver supports 3.3/2.5/1.8-V interfaces in a 3.5-nm Tox, 1.8-V CMOS technology. A bias generator, its switch capacitors, and a level shifter with protection network guarantee reliability and improve noise rejection. Measured output timing degradation is 2.5 ps per I/O switching. Buried resistors limit variation in output impedance. Interface delay of 2 ns with worst case I/O switching allows 400-MHz operation.