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Modeling and Sizing for Minimum Energy Operation in Subthreshold Circuits

机译:亚阈值电路中最小能量运行的建模和尺寸确定

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摘要

This paper examines energy minimization for circuits operating in the subthreshold region. Subthreshold operation is emerging as an energy-saving approach to many energy-constrained applications where processor speed is less important. In this paper, we solve equations for total energy to provide an analytical solution for the optimum V{sub}(DD) and V{sub}T to minimize energy for a given frequency in subthreshold operation. We show the dependence of the optimum V{sub}(DD) for a given technology on design characteristics and operating conditions. This paper also examines the effect of sizing on energy consumption for subthreshold circuits. We show that minimum sized devices are theoretically optimal for reducing energy. A fabricated 0.18-μm test chip is used to compare normal sizing and sizing to minimize operational V{sub}(DD) and to verify the energy models. Measurements show that existing standard cell libraries offer a good solution for minimizing energy in subthreshold circuits.
机译:本文研究了在亚阈值区域内工作的电路的能量最小化问题。在处理器速度不太重要的许多能耗受限的应用中,亚阈值操作正在作为一种节能方法出现。在本文中,我们求解总能量的方程式,以提供最佳V {sub}(DD)和V {sub} T的解析解,以在亚阈值操作中将给定频率的能量最小化。我们显示了给定技术的最佳V {sub}(DD)对设计特性和工作条件的依赖性。本文还研究了尺寸调整对亚阈值电路能耗的影响。我们证明了最小尺寸的设备在理论上是降低能耗的最佳选择。使用制造的0.18-μm测试芯片比较正常尺寸和尺寸以最小化工作V {sub}(DD)并验证能量模型。测量表明,现有的标准单元库为将亚阈值电路中的能量降至最低提供了一个很好的解决方案。

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