Dual-Mode Low-Drop-Out Regulator/Power Gate With Linear and On–Off Conduction for Microprocessor Core On-Die Supply Voltages in 14 nm

摘要

A dual-mode digital power gate (PG) and linear low-drop-out regulator (LDO) has been demonstrated in 14 nm. A modified flipped source follower driver circuit is used to minimize / droops. The LDO has a novel compensation method which utilizes capacitance multiplication and can drive a 1–7 load without any external compensation elements. This LDO exhibits high-current drive capability (3 A) at low-dropout voltages () and high-current efficiency (), making it suitable to drive a microprocessor core.