机译:采用28nm逻辑LP CMOS的紧凑型变压器组合式极性/正交可重配置数字功率放大器
Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China;
Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China;
Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China;
Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China;
Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China;
Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China;
Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China;
Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China;
Class-D; CMOS; digital; dual mode; polar; power amplifier (PA); quadrature; transformer combiner;
机译:具有动态功率控制的45 nm LP CMOS变压器组合31.5 dBm相移功率放大器,可提高后退功率效率
机译:基于变压器的可重构数字极性Doherty功率放大器的设计,该放大器完全集成在体CMOS中
机译:采用28nm低功耗数字CMOS的毫米波低噪声放大器设计
机译:采用28nm逻辑LP CMOS的紧凑型2.4GHz极性/正交可重配置数字功率放大器
机译:CMOS极性数字功率放大器,用于高数据速率无线通信
机译:具有新型数字相关双采样和差分差动放大器的高速CMOS图像传感器
机译:一个30 dBm类-D功率放大器,带有开/关逻辑,用于28-NM CMOS中的集成三相发射机