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CMOS DATA PATH AND BICMOS OUTPUT BUFFER CIRCUIT HAVING BI-POLAR CURRENT AMPLIFIER

机译:具有双极性电流放大器的CMOS数据路径和BICMOS输出缓冲器电路

摘要

PURPOSE: To connect the advantage of the low power requirements and high speed processing of a CMOS transistor with the advantage of the low capacitance and high current amplification of a bi-polar transistor, and to obtain high input impedance and low output impedance. ;CONSTITUTION: A BICMOS output buffer circuit in which a CMOS transistor and a bi-polar transistor are integrated is connected between a high potential power rail VCCQ and a low potential power rail GNDN. A bi-polar output stage is formed of bi-polar output pull-up Q24 and Q22 and pull-down Q44 transistor through which relatively large currents are allowed to pass which are connected with an output V. A CMOS transistor including a CMOS input stage connected with an input V brings relatively high input impedance. The bi-polar output stage operates the current amplification of a data signal from a data signal path formed of the CMOS transistor. The input threshold voltage level of each pull-up and pull-down pre-driving input stage is shifted.;COPYRIGHT: (C)1993,JPO
机译:用途:将低功耗要求和CMOS晶体管的高速处理的优势与双极晶体管的低电容和高电流放大的优势相结合,并获得高输入阻抗和低输出阻抗。 ;构成:BICMOS输出缓冲电路(其中集成了CMOS晶体管和双极晶体管)连接在高电势电源轨VCCQ和低电势电源轨GNDN之间。双极性输出级由双极性输出上拉Q24和Q22以及下拉Q44晶体管组成,允许较大的电流通过,并与输出V连接。CMOS晶体管包括CMOS输入级与输入V连接的电阻会带来相对较高的输入阻抗。双极输出级操作来自由CMOS晶体管形成的数据信号路径的数据信号的电流放大。每个上拉和下拉预驱动输入级的输入阈值电压电平都发生了移位。版权所有:(C)1993,JPO

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