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Current-mode techniques for high-speed VLSI circuits with application to current sense amplifier for CMOS SRAM's

机译:高速VLSI电路的电流模式技术,应用于CMOS SRAM的电流检测放大器

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摘要

The speed of VLSI chips is increasingly limited by signal delay in long interconnect lines. A simple analysis shows that major speed improvements are possible when using current-mode rather than conventional voltage-mode signal transporting techniques. The key to this approach is the use of low-resistance current-signal circuits to drastically reduce the impedance level and the voltage swings on long interconnect lines. As an example, a simple four-transistor current-sense amplifier for fast CMOS SRAMs is proposed. The circuit presents a virtual short circuit to the bit lines, thus reducing the sensing delay, which is rendered practically insensitive to the bit-line capacitance. In addition, the virtual short circuit ensures equal bit-line voltages, thus eliminating the need for bit-line equalization during a read access.
机译:VLSI芯片的速度越来越受到长互连线中信号延迟的限制。一个简单的分析表明,使用电流模式而不是传统的电压模式信号传输技术时,可以大大提高速度。这种方法的关键是使用低电阻电流信号电路来大大降低阻抗水平,并且长互连线上的电压波动。作为示例,提出了一种用于快速CMOS SRAM的简单四晶体管电流检测放大器。该电路对位线造成虚拟短路,从而减少了检测延迟,这实际上使位线电容不敏感。此外,虚拟短路可确保相等的位线电压,从而消除了读取访问期间对位线均衡的需求。

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