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A 6-GHz integrated phase-locked loop using AlGaAs/GaAs heterojunction bipolar transistors

机译:使用AlGaAs / GaAs异质结双极晶体管的6 GHz集成锁相环

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A fully integrated 6-GHz phase-locked-loop (PLL) fabricated using AlGaAs/GaAs heterojunction bipolar transistors (HBTs) is described. The PLL is intended for use in multigigabit-per-second clock recovery circuits for fiber-optic communication systems. The PLL circuit consists of a frequency quadrupling ring voltage-controlled oscillator (VCO), a balanced phase detector, and a lag-lead loop filter. The closed-loop bandwidth is approximately 150 MHz. The tracking range was measured to be greater than 750 MHz at zero steady-state phase error. The nonaided acquisition range is approximately 300 MHz. This circuit is the first monolithic HBT PLL and is the fastest yet reported using a digital output VCO. The minimum emitter area was 3 mu m*10 mu m with f/sub t/=22 GHz and f/sub max/=30 GHz for a bias current of 2 mA. The speed of the PLL can be doubled by using 1- mu m*10- mu m emitters in next-generation circuits. The chip occupies a die area of 2-mm*3-mm and dissipates 800 mW with a supply voltage of -8 V.
机译:描述了使用AlGaAs / GaAs异质结双极晶体管(HBT)制造的完全集成的6 GHz锁相环(PLL)。 PLL旨在用于光纤通信系统的每秒数千兆位的时钟恢复电路中。 PLL电路由四倍频环压控振荡器(VCO),平衡相位检测器和滞后超前环路滤波器组成。闭环带宽约为150 MHz。在零稳态相位误差下,测得的跟踪范围大于750 MHz。无辅助采集范围约为300 MHz。该电路是第一个单片HBT PLL,并且是使用数字输出VCO报告的最快的电路。对于2 mA的偏置电流,最小发射极面积为3μm* 10μm,f / sub t / = 22 GHz,f / sub max / = 30 GHz。通过在下一代电路中使用1μm*10μm的发射器,可使PLL的速度提高一倍。该芯片的管芯面积为2mm * 3mm,在-8V的电源电压下耗散800mW。

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