Improving Student Performance Using Automated Testing of Simulated Digital Logic Circuits

摘要

JLSCircuitTester helps automate the testing and grading of circuits built using digital logic simulators. With many simulators, the testing and grading of circuits is tedious and time consuming enough that students do not test their circuits thoroughly. JLSCircuitTester addresses this problem by simplifying the means by which users specify sets of input and expected output values. In addition, it automatically verifies that the circuit under test produces the correct output. The projects submitted during the pilot semester contained approximately half as many errors as the previous semester's projects. The automatic evaluation has also simplified the grading of those projects.