Extraction of interface state density in oxide/III-V gate stacks

摘要

Extracted interface trap densities (D-it) in the oxide/III-V gate stacks vary strongly with the utilized measurement procedures and values of device parameters used in the extraction analysis. Such D-it dependency on both selected procedures and parameters compromises unambiguous extraction of energy distributions of defects affecting device characteristics. To overcome this uncertainty, we propose an extraction approach, which combines the essential features of the high-low method and Terman method, allowing us to self-consistently determine D-it distribution along with values of the critical device parameters, effective oxide thickness (EOT) and substrate doping density (N-d).