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Improvement of the storage ability of Si-rich oxide layer in poly-Si based nonvolatile memory devices by implementation of taguchi method

机译:通过Taguchi方法提高多晶硅基非易失性存储器件中富硅氧化物层的存储能力

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The storage ability of silicon-rich silicon oxide (Si-rich SiOx) floating gates plays a critical role in poly-Si nonvolatile memory devices. In this study, the Taguchi method, a statistical means of experimental design which allows for the optimization of the storage characteristics with a dramatic reduction in the number of experiments by approximately 90%, is used. The memory window of the metal insulator semiconductor devices is used as a figure of merit to find out the optimal process parameters. Furthermore, the analysis of variance showed that the substrate temperature is the dominant factor affecting the memory characteristics of the SiO(x )storage layers. A significant improvement in the performance of poly-Si nonvolatile memory devices using the optimal Si-rich SiOx as a charge storage layer was observed. These devices show retention of the threshold voltage shift exceeding similar to 98% after 10(4)s and similar to 96% after 10 years extrapolation with programming/erasing voltages of -12 V/+11 V at a low duration of 1 mu s. Therefore, the poly-Si based nonvolatile memory devices using Si-rich SiOx as a storage layer show a high potential for memory system applications.
机译:富含硅的氧化硅(Si富集的SiOx)浮栅的存储能力在多晶硅非易失性存储器件中起着至关重要的作用。在这项研究中,使用了Taguchi方法,这是一种实验设计的统计手段,它可以优化存储特性,并使实验次数大幅减少约90%。金属绝缘体半导体器件的存储窗口用作品质因数,以找出最佳工艺参数。此外,方差分析表明,衬底温度是影响SiO(x)存储层存储特性的主要因素。观察到使用最佳富硅SiOx作为电荷存储层的多晶硅非易失性存储器件的性能有了显着改善。这些器件显示出阈值电压偏移的保持率在10(4)s之后超过了98%,在10年的编程/擦除电压下以1μs的持续时间外推/擦除电压在10年后接近了96%。 。因此,使用富含Si的SiO x作为存储层的基于多晶硅的非易失性存储器件在存储系统应用中显示出很高的潜力。

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