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0.8-mm Pin Pitch BGAs, Part 3

机译:0.8mm引脚间距BGA,第3部分

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This article focuses on the use of any-layer-vias in which the micro-vias traverse only two layers individually; however, they can be stacked to span any set of layers including starting on therntop and ending on the bottom of the board. It is my belief that this general methodology will increase in popularity quickly and will eventually become the predominant via model for all PCBs.rnA footprint for a Virtex-5 with 1760 pins (1227 I/Os) at 1-mm pitch was converted to 0.8-mm pitch as the basis for the tests.rnThis test uses an any-layer-via stackup in which every layer is buildup and has a via-hole in it.
机译:本文关注于任何层通孔的使用,其中微通孔仅单独穿过两层。但是,它们可以堆叠成任何一组层,包括从板的顶部开始到板的底部结束。我相信,这种通用方法将迅速普及,最终将成为所有PCB的主流模型。rn具有1760引脚(1227 I / O)和1mm引脚间距的Virtex-5的占位面积转换为0.8 -mm间距作为测试的基础。该测试使用任何层的通孔堆叠,其中每个层都在其中堆叠并且在其中具有通孔。

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