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首页> 外文期刊>IEEE Transactions on Parallel and Distributed Systems >Compiler and run-time support for exploiting regularity within irregular applications
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Compiler and run-time support for exploiting regularity within irregular applications

机译:编译器和运行时支持,用于利用不规则应用程序中的规则性

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This paper starts from a well-known idea, that structure in irregular problems improves sequential performance, and tries to show that the same structure can also be exploited for parallelization of irregular problems on a distributed-memory multicomputer. In particular, we extend a well-known parallelization technique called run-time compilation to use structure information that is explicit on the array subscripts. This paper presents a number of internal representations suited to particular access patterns and shows how various preprocessing structures such as translation tables, trace arrays, and interprocessor communication schedules can be encoded in terms of one or more of these representations. We show how loop and index normalization are important for detection of irregularity in array references, as well as the presence of locality in such references. This paper presents methods for detection of irregularity, feasibility of inspection, and finally, placement of inspectors and interprocessor communication schedules. We show that this process can be automated through extensions to an HPF/Fortran-77 distributed-memory compiler (PARADIGM) and a new runtime support for irregular problems (PILAR) that uses a variety of internal representations of communication patterns. We devise performance measures which consider the relationship between the inspection cost, the execution cost, and the number of times the executor is invoked so that a comparison of the competing schemes can be performed independent of the number of iterations. Finally, we show experimental results on an IBM SP-2 that validate our approach. These results show that dramatic improvements in both memory requirements and execution time can be achieved by using these techniques.
机译:本文从一个众所周知的想法开始,即不规则问题中的结构可以提高顺序性能,并试图证明相同的结构也可以用于分布式内存多计算机上不规则问题的并行化。特别是,我们扩展了一种称为运行时编译的众所周知的并行化技术,以使用在数组下标上显式的结构信息。本文介绍了许多适合特定访问模式的内部表示形式,并展示了如何根据这些表示形式中的一种或多种来对各种预处理结构(例如转换表,跟踪数组和处理器间通信调度)进行编码。我们展示了循环和索引规范化对于检测数组引用中的不规则性以及此类引用中是否存在局部性很重要。本文介绍了检测异常情况的方法,检查的可行性,最后介绍了检查员的位置和处理器间的通信时间表。我们展示了可以通过扩展HPF / Fortran-77分布式内存编译器(PARADIGM)以及使用各种内部表示形式的对不规则问题的新运行时支持(PILAR)来自动执行此过程。我们设计了一种性能指标,该指标考虑了检查成本,执行成本和执行程序被调用的次数之间的关系,从而可以独立于迭代次数来执行竞争方案的比较。最后,我们在IBM SP-2上显示了验证我们的方法的实验结果。这些结果表明,使用这些技术可以显着改善内存需求和执行时间。

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