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首页> 外文期刊>Journal of Communications Technology and Electronics >Designing Elements of Protection against Electrostatic Discharges for High-Frequency CMOS Circuits
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Designing Elements of Protection against Electrostatic Discharges for High-Frequency CMOS Circuits

机译:高频CMOS电路防静电放电设计元素

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摘要

A new electric circuit layout and physical structure are proposed for an element of protection against electrostatic discharges. The new element features a twofold smaller resistance to the electrostatic discharge current. The reduced resistance is obtained by using additional transistors implementing feedback. The use of the new electric circuit layout and a new simulation technique that takes into account substrate transistors allows reductions in the element's area and its electric capacitance by factors of 1.5 and 1.6, respectively.
机译:为防止静电放电提出了一种新的电路布局和物理结构。新元件的抗静电放电电流小两倍。通过使用实现反馈的附加晶体管可以获得降低的电阻。使用新的电路布局和新的模拟技术(考虑了衬底晶体管),可以将元件的面积及其电容分别减小1.5倍和1.6倍。

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