Network-on-chip architectures and design methodologies

摘要

1. Introduction In this special issue, the guest editors have put together some of the new developments and trends in Network-on-Chip (NoC) architectures and design methodologies related to design of multi-core systems which use NoC as interconnection infrastructure. We received 58 submissions, two of which were invited, and a total of 16 were accepted. The high level of competition has led to the selection of top-level contributions from renowned academic institutions and industries, covering issues at different levels of the design process. In particular, the topics covered by this special issue include router architecture, routing and reconfiguration techniques, application mapping and visualization, application specific architectures, support for parallel programming, memory organization and reliability issues.