Preparation And Properties Of Thin Parylene Layers As The Gate Dielectrics For Organic Field Effect Transistors

摘要

We report on the fabrication and characterization of parylene C thin layers for organic electronic devices passivation and gate dielectric of organic field effect transistors (OFETs) development. The investigated thin parylene layers were deposited from the vapour phase in thickness ranging from 3 to 800 nm at room temperature. The thickness and surface morphology of parylene layers were characterized by ellipsometry and AFM technique. The quality of parylene structures were analysed by X-ray reflectivity and diffraction as well as micro-Raman spectroscopy. The measurements confirmed perfect homogeneity and structural properties of parylene layers. Two types of pentacene OFETs were prepared on the silicone dioxide and parylene surface with bottom contact structures. The results demonstrated that using parylene, as the gate dielectric layer is an effective method to fabricate OFETs with improved electric characteristics.